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Kinetis SDK API Reference Manual
1.0.0-beta
Freescale Semiconductor, Inc.
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The section describes the programming interface of the DSPI HAL driver. More...
Data Structures | |
| struct | dspi_data_format_config_t |
| DSPI data format settings configuration structure. More... | |
| struct | dspi_master_config_t |
| DSPI hardware configuration settings for master mode. More... | |
| struct | dspi_slave_config_t |
| DSPI hardware configuration settings for slave mode. More... | |
| struct | dspi_baud_rate_divisors_t |
| DSPI baud rate divisors settings configuration structure. More... | |
| struct | dspi_delay_settings_config_t |
| DSPI delay settings configuration structure. More... | |
| struct | dspi_command_config_t |
| DSPI command and data configuration structure. More... | |
Enumerations | |
| enum | dspi_status_t { kStatus_DSPI_Success = 0, kStatus_DSPI_SlaveTxUnderrun, kStatus_DSPI_SlaveRxOverrun, kStatus_DSPI_Timeout, kStatus_DSPI_Busy, kStatus_DSPI_NoTransferInProgress, kStatus_DSPI_InvalidBitCount, kStatus_DSPI_InvalidInstanceNumber, kStatus_DSPI_OutOfRange } |
| Error codes for the DSPI driver. More... | |
| enum | dspi_master_slave_mode_t { kDspiMaster = 1, kDspiSlave = 0 } |
| DSPI master or slave configuration. More... | |
| enum | dspi_clock_polarity_t { kDspiClockPolarity_ActiveHigh = 0, kDspiClockPolarity_ActiveLow = 1 } |
| DSPI clock polarity configuration for a given CTAR. More... | |
| enum | dspi_clock_phase_t { kDspiClockPhase_FirstEdge = 0, kDspiClockPhase_SecondEdge = 1 } |
| DSPI clock phase configuration for a given CTAR. More... | |
| enum | dspi_shift_direction_t { kDspiMsbFirst = 0, kDspiLsbFirst = 1 } |
| DSPI data shifter direction options for a given CTAR. More... | |
| enum | dspi_ctar_selection_t { kDspiCtar0 = 0, kDspiCtar1 = 1 } |
| DSPI Clock and Transfer Attributes Register (CTAR) selection. More... | |
| enum | dspi_pcs_polarity_config_t { kDspiPcs_ActiveHigh = 0, kDspiPcs_ActiveLow = 1 } |
| DSPI Peripheral Chip Select (PCS) Polarity configuration. More... | |
| enum | dspi_which_pcs_config_t { kDspiPcs0 = 1 << 0, kDspiPcs1 = 1 << 1, kDspiPcs2 = 1 << 2, kDspiPcs3 = 1 << 3, kDspiPcs4 = 1 << 4, kDspiPcs5 = 1 << 5 } |
| DSPI Peripheral Chip Select (PCS) configuration (which PCS to configure) More... | |
| enum | dspi_master_sample_point_t { kDspiSckToSin_0Clock = 0, kDspiSckToSin_1Clock = 1, kDspiSckToSin_2Clock = 2 } |
| DSPI Sample Point: Controls when the DSPI master samples SIN in Modified Transfer Format. More... | |
| enum | dspi_fifo_t { kDspiTxFifo = 0, kDspiRxFifo = 1 } |
| DSPI FIFO selects. More... | |
| enum | dspi_status_and_interrupt_request_t { kDspiTxComplete = BP_SPI_RSER_TCF_RE, kDspiTxAndRxStatus = BP_SPI_SR_TXRXS, kDspiEndOfQueue = BP_SPI_RSER_EOQF_RE, kDspiTxFifoUnderflow = BP_SPI_RSER_TFUF_RE, kDspiTxFifoFillRequest = BP_SPI_RSER_TFFF_RE, kDspiRxFifoOverflow = BP_SPI_RSER_RFOF_RE, kDspiRxFifoDrainRequest = BP_SPI_RSER_RFDF_RE } |
| DSPI status flags and interrupt request enable. More... | |
| enum | dspi_fifo_counter_pointer_t { kDspiRxFifoPointer = BP_SPI_SR_POPNXTPTR, kDspiRxFifoCounter = BP_SPI_SR_RXCTR, kDspiTxFifoPointer = BP_SPI_SR_TXNXTPTR, kDspiTxFifoCounter = BP_SPI_SR_TXCTR } |
| DSPI FIFO counter or pointer defines based on bit positions. More... | |
Variables | |
| static const uint32_t | s_baudratePrescaler [] = { 2, 3, 5, 7 } |
| static const uint32_t | s_baudrateScaler [] |
| uint32_t | dspi_data_format_config_t::bitsPerFrame |
| Bits per frame, minimum 4, maximum 16 (master), 32 (slave) | |
| dspi_clock_polarity_t | dspi_data_format_config_t::clkPolarity |
| Active high or low clock polarity. | |
| dspi_clock_phase_t | dspi_data_format_config_t::clkPhase |
| Clock phase setting to change and capture data. | |
| dspi_shift_direction_t | dspi_data_format_config_t::direction |
| MSB or LSB data shift direction This setting relevant only in master mode and can be ignored in slave mode. | |
| bool | dspi_master_config_t::isEnabled |
| Set to true to enable the DSPI peripheral. More... | |
| dspi_ctar_selection_t | dspi_master_config_t::whichCtar |
| Desired Clock and Transfer Attributes Register (CTAR) | |
| uint32_t | dspi_master_config_t::bitsPerSec |
| Baud rate in bits per second. | |
| uint32_t | dspi_master_config_t::sourceClockInHz |
| Module source clock. | |
| dspi_data_format_config_t | dspi_master_config_t::dataConfig |
| Data format configuration structure. | |
| bool | dspi_master_config_t::isSckContinuous |
| Disable(0) or Enable(1) continuous SCK operation. | |
| dspi_which_pcs_config_t | dspi_master_config_t::whichPcs |
| Desired Peripheral Chip Select (PCS) | |
| dspi_pcs_polarity_config_t | dspi_master_config_t::pcsPolarity |
| Peripheral Chip Select (PCS) polarity setting. More... | |
| dspi_master_sample_point_t | dspi_master_config_t::masterInSample |
| Master data-in (SIN) sample point setting. More... | |
| bool | dspi_master_config_t::isModifiedTimingFormatEnabled |
| Disable(0) or Enable(1) modified timing format. More... | |
| bool | dspi_master_config_t::isTxFifoDisabled |
| Disable(1) or Enable(0) Tx FIFO. | |
| bool | dspi_master_config_t::isRxFifoDisabled |
| Disable(1) or Enable(0) Rx FIFO. | |
| bool | dspi_slave_config_t::isEnabled |
| Set to true to enable the DSPI peripheral. More... | |
| dspi_data_format_config_t | dspi_slave_config_t::dataConfig |
| Data format configuration structure. | |
| bool | dspi_slave_config_t::isTxFifoDisabled |
| Disable(1) or Enable(0) Tx FIFO. | |
| bool | dspi_slave_config_t::isRxFifoDisabled |
| Disable(1) or Enable(0) Rx FIFO. | |
| bool | dspi_baud_rate_divisors_t::doubleBaudRate |
| Double Baud rate parameter setting. | |
| uint32_t | dspi_baud_rate_divisors_t::prescaleDivisor |
| Baud Rate Pre-scalar parameter setting. | |
| uint32_t | dspi_baud_rate_divisors_t::baudRateDivisor |
| Baud Rate scaler parameter setting. | |
| uint32_t | dspi_delay_settings_config_t::pcsToSckPre |
| PCS to SCK delay pre-scalar (PCSSCK) | |
| uint32_t | dspi_delay_settings_config_t::pcsToSck |
| PCS to SCK Delay scalar (CSSCK) | |
| uint32_t | dspi_delay_settings_config_t::afterSckPre |
| After SCK delay pre-scalar (PASC) | |
| uint32_t | dspi_delay_settings_config_t::afterSck |
| After SCK delay scalar (ASC) | |
| uint32_t | dspi_delay_settings_config_t::afterTransferPre |
| Delay after transfer pre-scalar (PDT) | |
| uint32_t | dspi_delay_settings_config_t::afterTransfer |
| Delay after transfer scalar (DT) | |
| bool | dspi_command_config_t::isChipSelectContinuous |
| Option to enable the continuous assertion of chip select between transfers. | |
| dspi_ctar_selection_t | dspi_command_config_t::whichCtar |
| The desired Clock and Transfer Attributes Register (CTAR) to use for CTAS. | |
| dspi_which_pcs_config_t | dspi_command_config_t::whichPcs |
| The desired PCS signal to use for the data transfer. | |
| bool | dspi_command_config_t::isEndOfQueue |
| Signals that the current transfer is the last in the queue. | |
| bool | dspi_command_config_t::clearTransferCount |
| Clears SPI_TCNT field; cleared before transmission starts. | |
Configuration | |
| dspi_status_t | dspi_hal_master_init (uint32_t instance, const dspi_master_config_t *config, uint32_t *calculatedBaudRate) |
| Configure the DSPI peripheral in master mode. More... | |
| dspi_status_t | dspi_hal_slave_init (uint32_t instance, const dspi_slave_config_t *config) |
| Configures the DSPI peripheral in slave mode. More... | |
| void | dspi_hal_reset (uint32_t instance) |
| Restores the DSPI to reset the configuration. More... | |
| static void | dspi_hal_enable (uint32_t instance) |
| Enable the DSPI peripheral, set MCR MDIS to 0. More... | |
| static void | dspi_hal_disable (uint32_t instance) |
| Disables the DSPI peripheral, sets MCR MDIS to 1. More... | |
| uint32_t | dspi_hal_set_baud (uint32_t instance, dspi_ctar_selection_t whichCtar, uint32_t bitsPerSec, uint32_t sourceClockInHz) |
| Sets the DSPI baud rate in bits per second. More... | |
| void | dspi_hal_set_baud_divisors (uint32_t instance, dspi_ctar_selection_t whichCtar, const dspi_baud_rate_divisors_t *divisors) |
| Configures the baud rate divisors manually. More... | |
| static void | dspi_hal_set_master_slave (uint32_t instance, dspi_master_slave_mode_t mode) |
| Configures the DSPI for master or slave. More... | |
| static void | dspi_hal_configure_continuous_sck (uint32_t instance, bool enable) |
| Configures the DSPI for the continuous SCK operation. More... | |
| static void | dspi_hal_configure_modified_timing_format (uint32_t instance, bool enable) |
| Configures the DSPI to enable modified timing format. More... | |
| static void | dspi_hal_configure_pcs_strobe (uint32_t instance, bool enable) |
| Configures the DSPI peripheral chip select strobe enable. More... | |
| static void | dspi_hal_configure_rx_fifo_overwrite (uint32_t instance, bool enable) |
| Configures the DSPI received FIFO overflow overwrite enable. More... | |
| void | dspi_hal_configure_pcs_polarity (uint32_t instance, dspi_which_pcs_config_t pcs, dspi_pcs_polarity_config_t activeLowOrHigh) |
| Configures the DSPI peripheral chip select polarity. More... | |
| void | dspi_hal_configure_fifos (uint32_t instance, bool disableTxFifo, bool disableRxFifo) |
| Configures the DSPI FIFOs. More... | |
| void | dspi_hal_flush_fifos (uint32_t instance, bool enableFlushTxFifo, bool enableFlushRxFifo) |
| Flushes the DSPI FIFOs. More... | |
| static void | dspi_hal_set_datain_samplepoint (uint32_t instance, dspi_master_sample_point_t samplePnt) |
| Configures when the DSPI master samples SIN in the Modified Transfer Format. More... | |
| static void | dspi_hal_start_transfer (uint32_t instance) |
| Starts the DSPI transfers, clears HALT bit in MCR. More... | |
| static void | dspi_hal_stop_transfer (uint32_t instance) |
| Stops (halts) DSPI transfers, sets HALT bit in MCR. More... | |
| dspi_status_t | dspi_hal_configure_data_format (uint32_t instance, dspi_ctar_selection_t whichCtar, const dspi_data_format_config_t *config) |
| Configures the data format for a particular CTAR. More... | |
| void | dspi_hal_configure_delays (uint32_t instance, dspi_ctar_selection_t whichCtar, const dspi_delay_settings_config_t *config) |
| Configures the delays for a particular CTAR, master mode only. More... | |
DMA | |
| void | dspi_hal_configure_dma (uint32_t instance, bool enableTransmit, bool enableReceive) |
| Configures transmit and receive DMA requests. More... | |
Low power | |
| static void | dspi_hal_configure_doze_mode (uint32_t instance, bool enable) |
| Configures the DSPI operation during doze mode. More... | |
Interrupts | |
| void | dspi_hal_configure_interrupt (uint32_t instance, dspi_status_and_interrupt_request_t interruptSrc, bool enable) |
| Configures the DSPI interrupts. More... | |
| static bool | dspi_hal_get_interrupt_config (uint32_t instance, dspi_status_and_interrupt_request_t interruptSrc) |
| Gets the DSPI interrupt configuration, returns if interrupt request is enabled or disabled. More... | |
Status | |
| static bool | dspi_hal_get_status_flag (uint32_t instance, dspi_status_and_interrupt_request_t statusFlag) |
| Gets the DSPI status flag state. More... | |
| static void | dspi_hal_clear_status_flag (uint32_t instance, dspi_status_and_interrupt_request_t statusFlag) |
| Clears the DSPI status flag. More... | |
| static uint32_t | dspi_hal_get_fifo_counter_or_pointer (uint32_t instance, dspi_fifo_counter_pointer_t desiredParameter) |
| Gets the DSPI FIFO counter or pointer. More... | |
Data transfer | |
| static uint32_t | dspi_hal_read_data (uint32_t instance) |
| Reads data from the data buffer. More... | |
| static void | dspi_hal_write_data_slave_mode (uint32_t instance, uint32_t data) |
| Writes data into the data buffer, slave mode. More... | |
| struct dspi_data_format_config_t |
This structure contains the data format settings. These settings apply to a specific CTARn register, which the user must provide in this structure.
Data Fields | |
| uint32_t | bitsPerFrame |
| Bits per frame, minimum 4, maximum 16 (master), 32 (slave) | |
| dspi_clock_polarity_t | clkPolarity |
| Active high or low clock polarity. | |
| dspi_clock_phase_t | clkPhase |
| Clock phase setting to change and capture data. | |
| dspi_shift_direction_t | direction |
| MSB or LSB data shift direction This setting relevant only in master mode and can be ignored in slave mode. | |
| struct dspi_master_config_t |
Use an instance of this structure with the dspi_hal_master_init() to configure the most common settings of the DSPI peripheral in master mode with a single function call.
The bitsPerSec member is handled in a special way. If this value is set to 0, then the baud is not set by the dspi_hal_master_init(), and must be set with a separate call to either the dspi_hal_set_baud() or the dspi_hal_set_baud_divisors(). This can be useful when you know the divisors in advance and don't want to spend the time to compute them for the provided rate in bits/sec.
This structure also contains another structure template as a member: dspi_data_format_config_t dataConfig. An example usage for this is assuming declaration dspi_master_config_t dspiConfig:
Data Fields | |
| bool | isEnabled |
| Set to true to enable the DSPI peripheral. More... | |
| dspi_ctar_selection_t | whichCtar |
| Desired Clock and Transfer Attributes Register (CTAR) | |
| uint32_t | bitsPerSec |
| Baud rate in bits per second. | |
| uint32_t | sourceClockInHz |
| Module source clock. | |
| dspi_data_format_config_t | dataConfig |
| Data format configuration structure. | |
| bool | isSckContinuous |
| Disable(0) or Enable(1) continuous SCK operation. | |
| dspi_which_pcs_config_t | whichPcs |
| Desired Peripheral Chip Select (PCS) | |
| dspi_pcs_polarity_config_t | pcsPolarity |
| Peripheral Chip Select (PCS) polarity setting. More... | |
| dspi_master_sample_point_t | masterInSample |
| Master data-in (SIN) sample point setting. More... | |
| bool | isModifiedTimingFormatEnabled |
| Disable(0) or Enable(1) modified timing format. More... | |
| bool | isTxFifoDisabled |
| Disable(1) or Enable(0) Tx FIFO. | |
| bool | isRxFifoDisabled |
| Disable(1) or Enable(0) Rx FIFO. | |
| struct dspi_slave_config_t |
Use an instance of this structure with the dspi_hal_slave_init() to configure the most common settings of the DSPI peripheral in slave mode with a single function call.
Data Fields | |
| bool | isEnabled |
| Set to true to enable the DSPI peripheral. More... | |
| dspi_data_format_config_t | dataConfig |
| Data format configuration structure. | |
| bool | isTxFifoDisabled |
| Disable(1) or Enable(0) Tx FIFO. | |
| bool | isRxFifoDisabled |
| Disable(1) or Enable(0) Rx FIFO. | |
| struct dspi_baud_rate_divisors_t |
Note: These settings are relevant only in master mode. This structure contains the baud rate divisor settings, which provides the user with the option to explicitly set these baud rate divisors. In addition, the user must also set the CTARn register with the divisor settings.
Data Fields | |
| bool | doubleBaudRate |
| Double Baud rate parameter setting. | |
| uint32_t | prescaleDivisor |
| Baud Rate Pre-scalar parameter setting. | |
| uint32_t | baudRateDivisor |
| Baud Rate scaler parameter setting. | |
| struct dspi_delay_settings_config_t |
Note: These settings are relevant only in master mode. This structure contains the various delay settings. These settings apply to a specific CTARn register, which the user must provide in this structure.
Data Fields | |
| uint32_t | pcsToSckPre |
| PCS to SCK delay pre-scalar (PCSSCK) | |
| uint32_t | pcsToSck |
| PCS to SCK Delay scalar (CSSCK) | |
| uint32_t | afterSckPre |
| After SCK delay pre-scalar (PASC) | |
| uint32_t | afterSck |
| After SCK delay scalar (ASC) | |
| uint32_t | afterTransferPre |
| Delay after transfer pre-scalar (PDT) | |
| uint32_t | afterTransfer |
| Delay after transfer scalar (DT) | |
| struct dspi_command_config_t |
Note: This structure is used with the PUSHR register, which provides the means to write to the Tx FIFO. Data written to this register is transferred to the Tx FIFO. Eight or sixteen-bit write accesses to the PUSHR transfer all 32 register bits to the Tx FIFO. The register structure is different in master and slave modes. In master mode, the register provides 16-bit command and 16-bit data to the Tx FIFO. In slave mode all 32 register bits can be used as data, supporting up to 32-bit SPI frame operation.
Data Fields | |
| bool | isChipSelectContinuous |
| Option to enable the continuous assertion of chip select between transfers. | |
| dspi_ctar_selection_t | whichCtar |
| The desired Clock and Transfer Attributes Register (CTAR) to use for CTAS. | |
| dspi_which_pcs_config_t | whichPcs |
| The desired PCS signal to use for the data transfer. | |
| bool | isEndOfQueue |
| Signals that the current transfer is the last in the queue. | |
| bool | clearTransferCount |
| Clears SPI_TCNT field; cleared before transmission starts. | |
| enum dspi_status_t |
| enum dspi_clock_phase_t |
| enum dspi_fifo_t |
| dspi_status_t dspi_hal_master_init | ( | uint32_t | instance, |
| const dspi_master_config_t * | config, | ||
| uint32_t * | calculatedBaudRate | ||
| ) |
This function initializes the module to the user defined settings and default settings in master mode. This is an example demonstrating how to define the dspi_master_config_t structure and call the dspi_hal_master_init function:
| instance | Module instance number |
| config | Pointer to the master mode configuration data structure |
| calculatedBaudRate | The calculated baud rate passed back to the user for them to determine if the calculated baud rate is close enough to meet their needs. |
| dspi_status_t dspi_hal_slave_init | ( | uint32_t | instance, |
| const dspi_slave_config_t * | config | ||
| ) |
This function initializes the DSPI module for slave mode. This is an example demonstrating how to define the dspi_slave_config_t structure and call the dspi_hal_slave_init function:
| instance | Module instance number |
| config | Pointer to the slave mode configuration data structure |
| void dspi_hal_reset | ( | uint32_t | instance | ) |
This function basically resets all of the DSPI registers to their default setting including disabling the module.
| instance | Module instance number |
|
inlinestatic |
| instance | Module instance number |
|
inlinestatic |
| instance | Module instance number |
| uint32_t dspi_hal_set_baud | ( | uint32_t | instance, |
| dspi_ctar_selection_t | whichCtar, | ||
| uint32_t | bitsPerSec, | ||
| uint32_t | sourceClockInHz | ||
| ) |
This function takes in the desired bitsPerSec (baud rate) and calculates the nearest possible baud rate without exceeding the desired baud rate, and returns the calculated baud rate in bits-per-second. It requires that the caller also provide the frequency of the module source clock (in Hertz).
| instance | Module instance number |
| whichCtar | The desired Clock and Transfer Attributes Register (CTAR) of the type dspi_ctar_selection_t |
| bitsPerSec | The desired baud rate in bits per second |
| sourceClockInHz | Module source input clock in Hertz |
| void dspi_hal_set_baud_divisors | ( | uint32_t | instance, |
| dspi_ctar_selection_t | whichCtar, | ||
| const dspi_baud_rate_divisors_t * | divisors | ||
| ) |
This function allows the caller to manually set the baud rate divisors in the event that these dividers are known and the caller does not wish to call the dspi_hal_set_baud function.
| instance | Module instance number |
| whichCtar | The desired Clock and Transfer Attributes Register (CTAR) of type dspi_ctar_selection_t |
| divisors | Pointer to a structure containing the user defined baud rate divisor settings |
|
inlinestatic |
| instance | Module instance number |
| mode | Mode setting (master or slave) of type dspi_master_slave_mode_t |
|
inlinestatic |
| instance | Module instance number |
| enable | Enables (true) or disables(false) continuous SCK operation. |
|
inlinestatic |
| instance | Module instance number |
| enable | Enables (true) or disables(false) modified timing format. |
|
inlinestatic |
Configures the PCS[5] to be the active-low PCS Strobe output.
PCS[5] is a special case that can be configured as an active low PCS strobe or as a Peripheral Chip Select in master mode. When configured as a strobe, it provides a signal to an external demultiplexer to decode PCS[0] to PCS[4] signals into as many as 128 glitch-free PCS signals.
| instance | Module instance number |
| enable | Enable (true) PCS[5] to operate as the peripheral chip select (PCS) strobe If disable (false), PCS[5] operates as a peripheral chip select |
|
inlinestatic |
When enabled, this function allows incoming receive data to overwrite the existing data in the receive shift register when the Rx FIFO is full. Otherwise when disabled, the incoming data is ignored when the RX FIFO is full.
| instance | Module instance number. |
| enable | If enabled (true), allows incoming data to overwrite Rx FIFO contents when full, else incoming data is ignored. |
| void dspi_hal_configure_pcs_polarity | ( | uint32_t | instance, |
| dspi_which_pcs_config_t | pcs, | ||
| dspi_pcs_polarity_config_t | activeLowOrHigh | ||
| ) |
This function takes in the desired peripheral chip select (PCS) and it's corresponding desired polarity and configures the PCS signal to operate with the desired characteristic.
| instance | Module instance number |
| pcs | The particular peripheral chip select (parameter value is of type dspi_which_pcs_config_t) for which we wish to apply the active high or active low characteristic. |
| activeLowOrHigh | The setting for either "active high, inactive low (0)" or "active low, inactive high(1)" of type dspi_pcs_polarity_config_t. |
| void dspi_hal_configure_fifos | ( | uint32_t | instance, |
| bool | disableTxFifo, | ||
| bool | disableRxFifo | ||
| ) |
This function allows the caller to disable/enable the Tx and Rx FIFOs (independently). Note that to disable, the caller must pass in a logic 1 (true) for the particular FIFO configuration. To enable, the caller must pass in a logic 0 (false). For example, to enable both the Tx and Rx FIFOs, the caller makes this function call (where instance is the desired module instance number):
| instance | Module instance number |
| disableTxFifo | Disables (false) the TX FIFO, else enables (true) the TX FIFO |
| disableRxFifo | Disables (false) the RX FIFO, else enables (true) the RX FIFO |
| void dspi_hal_flush_fifos | ( | uint32_t | instance, |
| bool | enableFlushTxFifo, | ||
| bool | enableFlushRxFifo | ||
| ) |
| instance | Module instance number |
| enableFlushTxFifo | Flushes (true) the Tx FIFO, else do not flush (false) the Tx FIFO |
| enableFlushRxFifo | Flushes (true) the Rx FIFO, else do not flush (false) the Rx FIFO |
|
inlinestatic |
This function controls when the DSPI master samples SIN (data in) in the Modified Transfer Format. Note that this is valid only when the CPHA bit in the CTAR register is 0.
| instance | Module instance number |
| samplePnt | selects when the data in (SIN) is sampled, of type dspi_master_sample_point_t. This value selects either 0, 1, or 2 system clocks between the SCK edge and the SIN (data in) sample. |
|
inlinestatic |
This function call called whenever the module is ready to begin data transfers in either master or slave mode.
| instance | Module instance number |
|
inlinestatic |
This function call stops data transfers in either master or slave mode.
| instance | Module instance number |
| dspi_status_t dspi_hal_configure_data_format | ( | uint32_t | instance, |
| dspi_ctar_selection_t | whichCtar, | ||
| const dspi_data_format_config_t * | config | ||
| ) |
This function configures the bits-per-frame, polarity, phase, and shift direction for a particular CTAR. An example use case is as follows:
| instance | Module instance number |
| whichCtar | The desired Clock and Transfer Attributes Register (CTAR) of type dspi_ctar_selection_t. |
| config | Pointer to a structure containing the user defined data format configuration settings. |
| void dspi_hal_configure_delays | ( | uint32_t | instance, |
| dspi_ctar_selection_t | whichCtar, | ||
| const dspi_delay_settings_config_t * | config | ||
| ) |
This function configures the PCS to SCK delay pre-scalar (PCSSCK), the PCS to SCK Delay scalar (CSSCK), the After SCK delay pre-scalar (PASC), the After SCK delay scalar (ASC), the Delay after transfer pre-scalar (PDT), and the Delay after transfer scalar (DT). The following is an example use case of this function:
| instance | Module instance number |
| whichCtar | The desired Clock and Transfer Attributes Register (CTAR) of type dspi_ctar_selection_t. |
| config | Pointer to a structure containing the user defined delay configuration settings. |
| void dspi_hal_configure_dma | ( | uint32_t | instance, |
| bool | enableTransmit, | ||
| bool | enableReceive | ||
| ) |
This function configures the FIFOs to generate a DMA or an interrupt request. Note that the corresponding request enable must also be set. For the Transmit FIFO Fill, in order to generate a DMA request, the Transmit FIFO Fill Request Enable (TFFF_RE) must also be set. Similarly for the Receive FIFO Drain Request, to generate a DMA request, the Receive FIFO Drain Request Enable (RFDF_RE) must also be set. These requests can be configured with the function dspi_hal_configure_interrupt(). To enable DMA operation, first enable the desired request enable by using the dspi_hal_configure_interrupt() function and then use the dspi_hal_configure_dma() to configure the request and generate a DMA request.
| enableTransmit | Configures Tx FIFO fill request to generate a DMA or interrupt request |
| enableReceive | Configures Rx FIFO fill request to generate a DMA or interrupt request |
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inlinestatic |
This function provides support for an externally controlled doze mode, power-saving, mechanism. When disabled, the doze mode has no effect on the DSPI, and when enabled, the Doze mode disables the DSPI.
| instance | Module instance number |
| enable | If disabled (false), the doze mode has no effect on the DSPI, if enabled (true), the doze mode disables the DSPI. |
| void dspi_hal_configure_interrupt | ( | uint32_t | instance, |
| dspi_status_and_interrupt_request_t | interruptSrc, | ||
| bool | enable | ||
| ) |
This function configures the various interrupt sources of the DSPI. The parameters are instance, interrupt source, and enable/disable setting. The interrupt source is a typedef enum whose value is the bit position of the interrupt source setting within the RSER register. In the DSPI, all interrupt configuration settings are in one register. The typedef enum equates each interrupt source to the bit position defined in the device header file. The function uses these bit positions in its algorithm to enable/disable the interrupt source, where interrupt source is the dspi_status_and_interrupt_request_t type.
| instance | Module instance number |
| interruptSrc | The interrupt source, of type dspi_status_and_interrupt_request_t |
| enable | Enable (true) or disable (false) the interrupt source to generate requests |
|
inlinestatic |
This function returns the requested interrupt source setting (enabled or disabled, of type bool). The parameters to pass in are instance and interrupt source. It utilizes the same enum definitions for the interrupt sources as described in the "interrupt configuration" function. The function uses these bit positions in its algorithm to obtain the desired interrupt source setting.
| instance | Module instance number |
| interruptSrc | The interrupt source, of type dspi_status_and_interrupt_request_t |
|
inlinestatic |
The status flag is defined in the same enum as the interrupt source enable because the bit position of the interrupt source and corresponding status flag are the same in the RSER and SR registers. The function uses these bit positions in its algorithm to obtain the desired flag state, similar to the dspi_get_interrupt_config function.
| instance | Module instance number |
| statusFlag | The status flag, of type dspi_status_and_interrupt_request_t |
|
inlinestatic |
This function clears the desired status bit by using a write-1-to-clear. The user passes in the instance and the desired status bit to clear. The list of status bits is defined in the dspi_status_and_interrupt_request_t. The function uses these bit positions in its algorithm to clear the desired flag state. It uses this macro:
| instance | Module instance number |
| statusFlag | The status flag, of type dspi_status_and_interrupt_request_t |
|
inlinestatic |
This function returns the number of entries or the next pointer in the Tx or Rx FIFO. The parameters to pass in are the instance and either the Tx or Rx FIFO counter or a pointer. The latter is an enum type defined as the bitmask of those particular bit fields found in the device header file. For example:
| instance | Module instance number |
| desiredParameter | Desired parameter to obtain, of type dspi_fifo_counter_pointer_t |
|
inlinestatic |
| instance | Module instance number |
|
inlinestatic |
In slave mode, up to 32-bit words may be written.
| instance | Module instance number |
| data | The data to send |
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static |
| bool dspi_master_config_t::isEnabled |
| dspi_pcs_polarity_config_t dspi_master_config_t::pcsPolarity |
| dspi_master_sample_point_t dspi_master_config_t::masterInSample |
| bool dspi_master_config_t::isModifiedTimingFormatEnabled |
| bool dspi_slave_config_t::isEnabled |